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[VHDL-FPGA-VerilogUART

Description: VHDL语言写的串口发送、接收程序,根据晶振和相应的波特率修改分频器就可以实现!-Written in VHDL serial send, receive, process, according to crystal and the corresponding baud rate divider changes can be achieved!
Platform: | Size: 2048 | Author: 康丙寅 | Hits:

[VHDL-FPGA-Veriloguart-txblock

Description: vhdl实现了UART的数据发送,将八位并行数据转成串行数据输出,并加上起始位和奇偶校验位,停止位。-vhdl UART data transmission realized, the eight parallel data into serial data output, plus the start bit and parity bits, stop bits.
Platform: | Size: 5120 | Author: 刘毅 | Hits:

[VHDL-FPGA-VerilogASIC_VHDL_FPGA_design_lectureNotes

Description: 这是美国普渡大学(Purdue University West Lafayette)ASIC design 的课件完整版!带事例和讲解的非常好的VHDL学习材料!含有vhdl 基础知识,设计步骤,UART, RTL,Test Bench 以及测试和调试,DEBUG等各种VHDL设计者必学知识!-This is Purdue University (USA) ECE 337 ASIC design class lecture notes! very classic! The content include basics of vhdl, design process, UART design, RTL design, test and debug etc,etc VERY helpful to VHDL learners. A MUST SEE !
Platform: | Size: 10332160 | Author: zhou | Hits:

[VHDL-FPGA-VerilogUART

Description: 利用FPGA接受232芯片的串口数据,可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
Platform: | Size: 1189888 | Author: 杨然 | Hits:

[VHDL-FPGA-Veriloguart-(VHDL)

Description: 利用VHDL语言实现的UART串口通讯,以经过下载验证-the UART program with VHDL as develop language
Platform: | Size: 11264 | Author: 艾顺义 | Hits:

[VHDL-FPGA-VerilogUART

Description: This vhdl code has a simple implementation of an UART receiver. This code was generated march 2011 as a universuty project
Platform: | Size: 1024 | Author: plcpe | Hits:

[VHDL-FPGA-VerilogUART

Description: 这是VHDL编写的UART源码,测试成功,欢饮下载-It is written in UART VHDL source code, the test is successful, Huanyin download
Platform: | Size: 4270080 | Author: teamcen | Hits:

[VHDL-FPGA-VerilogUART

Description: 用VHDL实现与电脑串口进行通信。已通过开发板验证正确。开发板时钟50M,波特率19200.-VHDL implementation using serial communication with the computer. Has been verified through the development board are correct.
Platform: | Size: 796672 | Author: 林后斌 | Hits:

[VHDL-FPGA-VerilogFPGA-UART

Description: 该资料是实现VHDL的串口通信(UART),RS232接口协议,-VHDL implementation of serial communication
Platform: | Size: 2087936 | Author: lp | Hits:

[VHDL-FPGA-VerilogUART

Description: 串口VHDL程序,Xilinxṩ 测试成功。-Serial VHDL program, Xilinxṩ test was successful.
Platform: | Size: 11264 | Author: weixin | Hits:

[Software Engineeringapb_uart

Description: 基于APB总线的UART详细设计方案和实现-APB-based detailed design and implementation of UART
Platform: | Size: 22528 | Author: 东东 | Hits:

[VHDL-FPGA-Veriloguart-

Description: 通用异步通讯UART的工程文档,ISE打开工程,里面有VERILOG的源代码,可以编译通过-UART Universal Asynchronous communication engineering documents, ISE open the project, which has VERILOG source code can be compiled
Platform: | Size: 30720 | Author: mike | Hits:

[VHDL-FPGA-Veriloguart

Description: 一个简单的UART程序,包括接收,发送,波特率产生-A simple UART program, including receiving, sending, baud rate generation
Platform: | Size: 5120 | Author: 洪琳琅 | Hits:

[VHDL-FPGA-VerilogA-Simplified-VHDL-UART

Description: In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this lab we will design a simplified UART (Universal Asynchronous Reciever Transmitter) in VHDL and download it to the FPGA on the XS40 baord. Serial communication is often used either to control or to receive data from an embedded microprocessor. Serial communication is a form of I/O in which the bits of a byte begin transferred appear one after the other in a timed sequence on a single wire. Serial communication has become the standard for intercomputer communication. In this lab, we ll try to build a serial link between 8051 and PC using RS232.
Platform: | Size: 374784 | Author: mezzich | Hits:

[VHDL-FPGA-Veriloguart1

Description: vhdl uart module. this file is used to transfer programs frm fpga xilinx spartam 3e kit to desktop pc through rs232 serial port.
Platform: | Size: 282624 | Author: pingakshya | Hits:

[VHDL-FPGA-Veriloguart

Description: 基于VHDL语言的fpga uart 口通讯的源程序,经验证可用,开发环境Quartus -VHDL UART QUARTUS II
Platform: | Size: 4096 | Author: 谢家 | Hits:

[VHDL-FPGA-VerilogUART

Description: uart通用异步收发器,包括收发模块和。数据产生模块-uart transmit and reciver
Platform: | Size: 986112 | Author: 涂强 | Hits:

[VHDL-FPGA-VerilogVHDL-uart

Description: 本程序应用VHDL语言,详细描述了RS232串口协议,包括发送,接收,波特率的产生,模块化编程,对于初学者尤为有宜!-The program in VHDL language, the detailed description of the RS232 serial protocol, including sending, receiving, and baud rate generation, modular programming, especially for beginners should be!
Platform: | Size: 13312 | Author: wangsheng | Hits:

[VHDL-FPGA-Veriloguart

Description: UART 串口收发程序 VHDL UART 串口收发程序 VHDL-UART serial port transceiver procedures VHDL
Platform: | Size: 2048 | Author: 蒋坤 | Hits:

[VHDL-FPGA-Verilogcpld-urat-vhdl

Description: 基于CPLD的VHDL UART代码,串行异步通信,含代码及仿真图-Based on the CPLD VHDL UART code, serial asynchronous communication, including code and simulation diagram
Platform: | Size: 328704 | Author: 瞿鑫 | Hits:
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